Invention Grant
- Patent Title: Integrated circuits with contacting gate structures
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Application No.: US15981004Application Date: 2018-05-16
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Publication No.: US10685966B2Publication Date: 2020-06-16
- Inventor: Jhon Jhy Liaw
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/11 ; H01L29/66 ; H01L29/417 ; H01L27/088

Abstract:
Examples of an integrated circuit with a contacting gate structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a memory cell that includes a plurality of fins and a gate extending over a first fin of the plurality of fins and a second fin of the plurality of fins. The gate includes a gate electrode that physically contacts the first fin and a gate dielectric disposed between the gate electrode and the second fin. In some such examples, the first fin includes a source/drain region and a doped region that physically contacts the gate electrode.
Public/Granted literature
- US20190355729A1 Integrated Circuits with Contacting Gate Structures Public/Granted day:2019-11-21
Information query
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