Invention Grant
- Patent Title: Method for incorporating multiple channel materials in a complimentary field effective transistor (CFET) device
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Application No.: US16204606Application Date: 2018-11-29
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Publication No.: US10685887B2Publication Date: 2020-06-16
- Inventor: Jeffrey Smith , Subhadeep Kal
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/8238 ; H01L29/423 ; H01L21/3065 ; H01L21/822 ; H01L29/161 ; H01L27/092 ; H01L29/06 ; H01L29/66 ; H01L29/775 ; H01L27/06 ; H01L29/786 ; H01L29/78

Abstract:
A method of manufacturing a semiconductor device includes: providing a substrate having a base fin structure thereon, the base fin structure including a first stacked portion for forming a channel of a first gate-all-around (GAA) transistor, the first stacked portion including a first channel material, a second stacked portion for forming a channel of a second GAA transistor, the second stacked portion including second channel material, and a sacrificial portion separating the first stack portion from the second stack portion, wherein the first channel material, the second channel material and the sacrificial material have different chemical compositions from each other; exposing the side of the base fin structure to an isotropic etch process which selectively etches one of the first channel material, the second channel material and the sacrificial material; and forming first and second GAA gate structures around said first channel material and said second channel material respectively.
Public/Granted literature
Information query
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