Invention Grant
- Patent Title: Fin isolation to mitigate local layout effects
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Application No.: US16126521Application Date: 2018-09-10
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Publication No.: US10685866B2Publication Date: 2020-06-16
- Inventor: Huimei Zhou , Gen Tsutsui , Andrew M. Greene , Dechao Guo , Huiming Bu , Robert Robison , Veeraraghavan S. Basker , Reinaldo Vega
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/762 ; H01L29/66 ; H01L21/32 ; H01L29/78
Abstract:
Integrated chips and methods of forming the same include oxidizing a portion of a semiconductor fin to electrically isolate active regions of the semiconductor fin. A semiconductor device is formed on each of the active regions.
Public/Granted literature
- US20200083088A1 FIN ISOLATION TO MITIGATE LOCAL LAYOUT EFFECTS Public/Granted day:2020-03-12
Information query
IPC分类:
