Invention Grant
- Patent Title: Methods, systems, and computer program products for implementing an electronic design with physical simulation using layout artwork
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Application No.: US16024655Application Date: 2018-06-29
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Publication No.: US10685166B1Publication Date: 2020-06-16
- Inventor: Chun-Teh Kao , An-Yu Kuo
- Applicant: Cadence Design Systems, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F30/398 ; G03F1/72 ; G03F1/36 ; G06F30/3323

Abstract:
Various techniques implement an electronic design with physical simulations using layout artwork. The approximate behaviors of the electronic design are determined. A region in the electronic design is identified. A first three-dimensional model is identified, if pre-existing, or generated, if non-existing, for the region in the electronic design. The behaviors of the region is determined using at least physics-based techniques or methodologies that are preconditioned upon at least a portion of the approximate behaviors determined for the electronic design.
Information query