Invention Grant
- Patent Title: Method of fabricating ferroelectric field-effect transistor
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Application No.: US16216833Application Date: 2018-12-11
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Publication No.: US10672894B2Publication Date: 2020-06-02
- Inventor: Jan Van Houdt , Hanns Christoph Adelmann , Han Chung Lin
- Applicant: IMEC vzw
- Applicant Address: BE Leuven
- Assignee: IMEC vzw
- Current Assignee: IMEC vzw
- Current Assignee Address: BE Leuven
- Agency: Knobbe, Martens, Olson & Bear LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@457f5b35
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/51 ; H01L29/16 ; H01L29/78 ; H01L21/02

Abstract:
The disclosed technology generally relates to methods of fabricating a semiconductor device, and more particularly to methods of fabricating a ferroelectric field-effect transistor (FeFET). According to one aspect, a method of fabricating a FeFET includes forming a layer stack on a gate structure, wherein forming the layer stack comprises a ferroelectric layer followed by forming a sacrificial stressor layer. The method additionally includes heat-treating the layer stack to cause a phase transition in the ferroelectric layer. The method additionally includes, subsequent to the heat treatment, replacing the sacrificial stressor layer with a two-dimensional (2D) material channel layer. The method further includes forming a source contact and a drain contact contacting the 2D material channel layer.
Public/Granted literature
- US20190198638A1 METHOD OF FABRICATING FERROELECTRIC FIELD-EFFECT TRANSISTOR Public/Granted day:2019-06-27
Information query
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