A verification system comprises: a reconfigurable hardware modeling device programmed to implement a hardware model of a circuit design; a first computing unit configured to execute a first software program; and a second computing unit configured to execute a testbench model of a second software program. The execution of the first software program and the testbench model of the second software program generates first stimuli and second stimuli for an operation of the hardware model of the circuit design, respectively. The first stimuli and the second stimuli are transmitted to the hardware model of the circuit design through a communication interface.