Invention Grant
- Patent Title: Semiconductor device including a re-interconnection layer and method for manufacturing same
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Application No.: US16058161Application Date: 2018-08-08
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Publication No.: US10658338B2Publication Date: 2020-05-19
- Inventor: Takayuki Tajima , Yoichiro Kurita , Kazuo Shimokawa
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@13c1d7e4
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/065 ; H01L23/498 ; H01L23/31 ; H01L21/48 ; H01L25/00 ; H01L21/56 ; H01L23/00 ; H01L21/683

Abstract:
According to one embodiment, a semiconductor device includes a re-interconnection layer, bumps, chips, and a resin member. The bumps are provided on a first surface of the re-interconnection layer. The chips are stacked on a second surface of the re-interconnection layer. The resin member is provided on the second surface, and covers the chips. The re-interconnection layer includes an insulating layer, an interconnection, a first via, an electrode layer, and a second via. The interconnection is provided in the insulating layer. The first via is provided in the insulating layer and connected to the interconnection. The electrode layer is provided in the insulating layer, formed of a metal material different from a material of the first via, exposed on the first surface, and connected to the first via and the bumps. The second via is provided in the insulating layer, and connected to the interconnection and the chips.
Public/Granted literature
- US20190267350A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2019-08-29
Information query
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