Invention Grant
- Patent Title: Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
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Application No.: US16186683Application Date: 2018-11-12
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Publication No.: US10658227B2Publication Date: 2020-05-19
- Inventor: Gang Wang , Jeffrey L. Libbert , Shawn George Thomas , Igor Peidous
- Applicant: GlobalWafers Co., Ltd
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/02 ; H01L21/763 ; H01L27/12
Abstract:
A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, a textured oxide, nitride, or oxynitride layer, a polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer. The multilayer structure is prepared in a manner that reduces wafer bow.
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