Apparatus for high speed ROM cells
Abstract:
An apparatus comprises a plurality of memory cells in rows and columns, a first word line electrically coupled to a first group of memory cells through a first word line strap structure comprising a first gate contact, a first-level via, a first metal line and a second-level via and a second word line electrically coupled to a second group of memory cells through a second word line strap structure, wherein the second word line strap structure and the first word line strap structure are separated by at least two memory cells.
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