A memory control device may include a buffer memory in which data is accessed by a unit of a slot; and a buffer interface suitable for controlling an access to the buffer memory. The buffer interface may include a mapping table suitable for storing the mapping between multiple virtual slot identification information (VBIDs) and multiple physical slot identification information (PBIDs); a buffer allocation unit suitable for determining a start VBID of the mapping table and the number of slots (NID) based on a size of data to write in the buffer memory, and allocating PBIDs of a free status to a buffer slot sequence in the mapping table, the buffer slot sequence including slots determined based on the start VBID and the NID; and a buffer access unit suitable for accessing data at positions of the PBIDs of the buffer memory based on the mapping table.