Invention Grant
- Patent Title: Frequency based bias voltage scaling for phase locked loops
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Application No.: US15194999Application Date: 2016-06-28
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Publication No.: US10651857B2Publication Date: 2020-05-12
- Inventor: Andreas Roithmeier , Thomas Gustedt , Herwig Dietl-Steinmaurer , Christian Wicpalek
- Applicant: Intel IP Corporation
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H03L7/083
- IPC: H03L7/083 ; H03L7/099 ; H03L7/08

Abstract:
A phase locked loop system includes bias voltage adjustment circuitry and a voltage regulator that outputs a smoothed core voltage to an oscillator. The bias voltage adjustment circuitry is configured to compute a scaled bias voltage based at least on a target frequency for the oscillator. The voltage regulator is configured to input i) the scaled bias voltage and ii) a selected core voltage that is selected based on the target operating frequency of the oscillator and generate the smoothed core voltage for output to the oscillator.
Public/Granted literature
- US20170373694A1 FREQUENCY BASED BIAS VOLTAGE SCALING FOR PHASE LOCKED LOOPS Public/Granted day:2017-12-28
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