A flip-flop generates a first feedback signal using a signal generated inside the flip-flop. The flip-flop includes a first stage circuit, a second stage circuit and a third stage circuit. The first stage circuit receives a first data signal and a clock signal and generates a first internal signal through a first node. The second stage circuit receives the first internal signal, the clock signal, and the first feedback signal and generates a second internal signal through a second node. The third stage circuit generates a second data signal by latching the second internal signal when the clock signal is at a first level, using the second internal signal and the clock signal. The second stage circuit cuts off at least one first current path between the second node and a power supply, based on the first feedback signal, when the clock signal is at a second level.