Invention Grant
- Patent Title: Charge compensation semiconductor devices
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Application No.: US16216831Application Date: 2018-12-11
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Publication No.: US10651271B2Publication Date: 2020-05-12
- Inventor: Daniel Tutuc , Christian Fachmann , Franz Hirler , Maximilian Treiber
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@541fc5f6
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L29/06 ; H01L29/40 ; H01L21/225 ; H01L29/10 ; H01L29/66 ; H01L29/78 ; H01L21/324

Abstract:
A method for forming a field-effect semiconductor device includes providing a wafer having a substantially compensated semiconductor layer extending to an upper side and including a semiconductor material which is co-doped with n-type dopants and p-type dopants. A peripheral area laterally surrounding an active area are defined in the wafer. Trenches in the active area are filled with a substantially intrinsic semiconductor material. More p-type dopants than n-type dopants are diffused from the compensated semiconductor layer into the intrinsic semiconductor material to form a plurality of p-type compensation regions in the trenches which are separated from each other by respective n-type drift portions. P-type dopants are introduced at least into a semiconductor zone of the peripheral area, so that the semiconductor zone and a dielectric layer on the upper side form an interface. A horizontal extension of the interface is larger than a vertical extension of the trenches.
Public/Granted literature
- US20190123137A1 Charge Compensation Semiconductor Devices Public/Granted day:2019-04-25
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