Invention Grant
- Patent Title: Methods and apparatus for wafer-level die bridge
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Application No.: US15835909Application Date: 2017-12-08
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Publication No.: US10651126B2Publication Date: 2020-05-12
- Inventor: Chien-Kang Hsiung , Arvind Sundarrajan
- Applicant: APPLIED MATERIALS, INC.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Moser Taboada
- Agent Alan Taboada
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L21/60 ; H01L23/31 ; H01L23/538 ; H01L21/66 ; H01L21/768 ; H01L23/00 ; H01L25/065 ; H01L25/10

Abstract:
A wafer-level bridge die is affixed with an adhesive layer to a redistribution layer (RDL) that has been temporarily bonded to a carrier. Electrical interconnects are formed on the RDL and on the bridge die and encapsulated in a first mold layer. A plurality of dies are coupled to the RDL and the bridge die such that a die is electrically connected to at least one electrical interconnect of the RDL and to at least one electrical interconnect of the bridge die. A second mold layer is formed on the first mold layer to encapsulate the plurality of dies. The temporary bond is then broken and the carrier is removed, exposing the RDL connections.
Public/Granted literature
- US20190181092A1 METHODS AND APPARATUS FOR WAFER-LEVEL DIE BRIDGE Public/Granted day:2019-06-13
Information query
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