Invention Grant
- Patent Title: High density antifuse co-integrated with vertical FET
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Application No.: US16411212Application Date: 2019-05-14
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Publication No.: US10651123B2Publication Date: 2020-05-12
- Inventor: Alexander Reznicek , Pouya Hashemi , Miaomiao Wang , Takashi Ando
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L23/525
- IPC: H01L23/525 ; H01L29/66 ; H01L29/78
Abstract:
A semiconductor device comprising an anti-fuse is disclosed. The semiconductor anti-fuse includes a highly doped source of a first conductivity type overlying a substrate. The semiconductor anti-fuse further includes a counter-doped layer of a second conductivity type arranged between the highly doped source and the substrate. The semiconductor anti-fuse further includes a highly doped fuse region extending over the highly doped source and comprising an epitaxial growth, the highly doped fuse region implanted with ions.
Public/Granted literature
- US20190295950A1 HIGH DENSITY ANTIFUSE CO-INTEGRATED WITH VERTICAL FET Public/Granted day:2019-09-26
Information query
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