Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US16138066Application Date: 2018-09-21
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Publication No.: US10651081B2Publication Date: 2020-05-12
- Inventor: Chung-Lin Huang
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/532 ; H01L21/285 ; H01L27/108

Abstract:
The present disclosure provides a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure includes a semiconductor substrate, a dielectric layer, a barrier layer, and a conductive layer. The semiconductor substrate has a plurality of mesas. The dielectric layer is disposed over the semiconductor substrate and has a plurality of blocks disposed over the mesas, respectively. The barrier layer is formed over a first lateral surface of the mesa, a second lateral surface of the block, an upper surface of the semiconductor substrate adjacent to the first lateral surface, and a front surface of the dielectric layer adjacent to the second lateral surface. The conductive layer has a base and a plurality of protrusions extending from the base and in contact with the barrier layer disposed over the upper surface, the first lateral surface, and the second lateral surface. A grain size of the base and the protrusions is consistent.
Public/Granted literature
- US20200098615A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2020-03-26
Information query
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