The present disclosure provides an array substrate and a display panel. The array substrate includes a display area and a non-display area surrounding the display area. The display area includes a first corner, and data lines extending along a first direction and gate lines extending along a second direction are provided on the display area. The first direction intersects the second direction. The non-display area includes a first non-display area, a second non-display area and a first corner non-display area. The first corner non-display area is adjacent to the first and second non-display areas. The first corner non-display area is adjacent to the first corner. A data end circuit, a first signal line section and a first shift register are located in the first corner non-display area. The data end circuit is disposed at a side of the first shift register close to the display area.