There are provided a memory device and an operating method thereof. A memory device includes: a peripheral circuit for decreasing threshold voltages of memory cells included in a selected memory block and then performing an erase verify operation for detecting a threshold voltage distribution of the memory cells, wherein the peripheral circuit applies an erase pulse to a well, bit lines or source line in which the selected memory block is included a preset number of times; and a control logic for outputting a voltage setup code according to the threshold voltage distribution of an erase status, which is detected by the erase verify operation.