- Patent Title: Decoder circuit for a broadband pulse amplitude modulation signal
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Application No.: US15852513Application Date: 2017-12-22
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Publication No.: US10594523B2Publication Date: 2020-03-17
- Inventor: Martin Bossard , Jörg Wieland
- Applicant: Tetra Semiconductors AG
- Applicant Address: CH Zürich
- Assignee: TETRA SEMICONDUCTOR AG
- Current Assignee: TETRA SEMICONDUCTOR AG
- Current Assignee Address: CH Zürich
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H04L25/49
- IPC: H04L25/49 ; H04L27/06 ; H04L1/00 ; G01R29/26 ; G11B20/14

Abstract:
Disclosed is a decoder circuit for a pulse amplitude modulation signal and a method of decoding a pulse amplitude modulation signal. The pulse amplitude modulation signal has a zeroth signal level, a first signal level, a second signal level and a third signal level. The decoder circuit comprises a first decision circuit, and a mapping circuit. The first decision circuit receives the pulse amplitude modulation signal and generates a low output signal for the first and the zeroth signal level, and generates a high output signal for the third and the second signal level. The mapping circuit receives the pulse amplitude modulation signal and generates a low output signal for the second and first signal level, and generates a high output signal for the third and zeroth signal level. Optionally, the decoder circuit comprises a logic circuit. The logic circuit receives the generated signal of the mapping circuit and the generated signal of the first decision circuit and generates a low output signal or a high output signal according to a predetermined truth table.
Public/Granted literature
- US20190199560A1 DECODER CIRCUIT FOR A BROADBAND PULSE AMPLITUDE MODULATION SIGNAL Public/Granted day:2019-06-27
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