A array substrate comprises: a substrate including a display area and a peripheral wiring area, wherein active switches, pixel units and signal lines are disposed in the display area, the pixel units are coupled to the active switches, the active switches are coupled to the signal lines, and the signal lines include gate lines and source lines, each pixel unit includes a first subpixel and a second subpixel are coupled to different gate lines, and coupled to a common source line, input interface of the gate lines is disposed in the wiring area; a gate driving module disposed in the wiring area and including output interfaces; connecting lines disposed between the input interfaces and the output interfaces, wherein the connecting lines include wiring line groups and jumper line groups, a sequence of signals of jumper line groups is different from a sequence of signals of wiring line groups.