Invention Grant
- Patent Title: Method and structure of forming strained channels for CMOS device fabrication
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Application No.: US15864577Application Date: 2018-01-08
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Publication No.: US10593672B2Publication Date: 2020-03-17
- Inventor: Juntao Li , Kangguo Cheng , John G. Gaudiello
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Vazken Alexanian
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L21/02 ; H01L29/78 ; H01L29/10 ; H01L29/66

Abstract:
A method for manufacturing a semiconductor device includes growing a first strained semiconductor layer on a substrate, the first strained semiconductor layer having a first type of strain, wherein the substrate comprises a first crystalline orientation at a top surface of the substrate, forming at least one trench in the substrate, wherein exposed sidewalls of the at least one trench have a second crystalline orientation different from the first crystalline orientation, growing a buffer layer in the at least one trench from the exposed sidewalls of the trench, and growing a second strained semiconductor layer on the buffer layer, the second strained semiconductor layer having a second type of strain, wherein the first type of strain is different from the second type of strain.
Public/Granted literature
- US20190214386A1 METHOD AND STRUCTURE OF FORMING STRAINED CHANNELS FOR CMOS DEVICE FABRICATION Public/Granted day:2019-07-11
Information query
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