Invention Grant
- Patent Title: Semiconductor device having a plurality of chips being stacked
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Application No.: US15216824Application Date: 2016-07-22
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Publication No.: US10593645B2Publication Date: 2020-03-17
- Inventor: Takahiro Shikibu , Yusuke Hamada , Osamu Moriyama
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2015-151935 20150731
- Main IPC: G11C7/10
- IPC: G11C7/10 ; H01L25/065 ; H01L23/00 ; H01L23/495 ; H01L23/538

Abstract:
A semiconductor device, includes: a first semiconductor chip including: a first substrate; a first via; a first rear surface-side pad connected to the first via; a first wiring layer; a first front surface-side pad formed on the first wiring layer; and an input circuit formed in the first substrate, an input signal wire connecting the first via, the first front surface-side pad, and an input terminal of the input circuit; and a second semiconductor chip including: a second substrate; a second wiring layer; a second front surface-side pad; and an output circuit formed in the second substrate, an output signal wire connecting the second front surface-side pad to an output terminal of the output circuit. The second semiconductor chip is stacked on a rear surface side of the first semiconductor chip, and the first rear surface-side pad and the second front surface-side pad are connected.
Public/Granted literature
- US20170033085A1 SEMICONDUCTOR DEVICE Public/Granted day:2017-02-02
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