Each of a plurality of semiconductor elements is provided with a first control terminal and a second control terminal. A built-in gate resistor is connected between the semiconductor element and the first control terminal. Individual voltage pulse signals are input to the second control terminals when the plurality of semiconductor elements are individually turned on and off. A common voltage pulse signal is input to some of the first control terminals when a first group of semiconductor elements is turned on and off in common. A common voltage pulse signal is input to others of the first control terminals when a second group of semiconductor elements is turned on and off in common.