Invention Grant
- Patent Title: Protection of low temperature isolation fill
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Application No.: US15815111Application Date: 2017-11-16
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Publication No.: US10586700B2Publication Date: 2020-03-10
- Inventor: Michael P. Belyansky , Richard A. Conti , Dechao Guo , Devendra K. Sadana , Jay W. Strane
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/762 ; H01L29/66 ; H01L21/3115 ; H01L21/3105 ; H01L29/78

Abstract:
A semiconductor structure includes a plurality of semiconductor fins on an upper surface of a semiconductor substrate. The semiconductor fins spaced apart from one another by a respective trench to define a fin pitch. A multi-layer electrical isolation region is contained in each trench. The multi-layer electrical isolation region includes an oxide layer and a protective layer. The oxide layer includes a first material on an upper surface of the semiconductor substrate. The protective layer includes a second material on an upper surface of the oxide layer. The second material is different than the first material. The first material has a first etch resistance and the second material has a second etch resistance that is greater than the first etch resistance.
Public/Granted literature
- US20190067079A1 PROTECTION OF LOW TEMPERATURE ISOLATION FILL Public/Granted day:2019-02-28
Information query
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