Invention Grant
- Patent Title: Layouting of interconnect lines in integrated circuits
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Application No.: US16000271Application Date: 2018-06-05
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Publication No.: US10579773B2Publication Date: 2020-03-03
- Inventor: Joachim Keinert , Jens Noack , Monika Strohmer , Holger Wetter
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Alexander G. Jochym
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L27/02

Abstract:
The invention relates to an integrated circuit comprising: a row of sink cells, a first driver cell, a second driver cell, an interconnect line connecting the first driver cell to the sink cells of the row; and a shunt line connecting the second driver cell to a point between ends of the interconnect line, wherein a segment of the interconnect line between the point and the first driver cell is bigger than 60% of a length the interconnect line and less than 80% of the length of the interconnect line.
Public/Granted literature
- US20180285513A1 LAYOUTING OF INTERCONNECT LINES IN INTEGRATED CIRCUITS Public/Granted day:2018-10-04
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