Invention Grant
- Patent Title: Using design proximity index and effect-to-design proximity ratio to control semiconductor processes and achieve enhanced yield
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Application No.: US15829668Application Date: 2017-12-01
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Publication No.: US10579769B2Publication Date: 2020-03-03
- Inventor: Raman K. Nurani , Anantha R. Sethuraman , Koushik Ragavan
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: G06T7/00
- IPC: G06T7/00 ; G06F17/50 ; H01L21/66

Abstract:
A method for detecting a design-impacting defect in an integrated circuit substrate is disclosed. In one implementation, a controller determines a distribution of intended geometric features in a design window of the integrated circuit substrate based on proximities of a plurality of points of interest in the design window to the intended geometric features. The controller obtains a set of intended contours from the distribution. The controller obtains a set of imaged contours from one or more images of the integrated circuit substrate. The controller compares the set of imaged contours to the set of intended contours to obtain a set of potential design-impacting defects in the intended geometric features. The controller determines a probability that a potential design-impacting defect from the set of potential design-impacting defects is a valid design-impacting defect. The controller takes a corrective action based on the determined probability.
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