Methods of analyzing and capacity planning for multi-core, multi-chip, multi-threaded computer system environments by analyzing the scalability of a fourth layer complexity, the processor boards, and incorporating this factor into the calculation of the expected throughput of a system constructed with multiple processor boards. In particular, the method may comprise identifying a system for which system performance prediction is desired, specifying a simulation model, and determining configuration parameters for the system, the system with at least one processor board, at least one chip per board, at least one core per chip, and at least one thread per core. The method may further comprise obtaining scalability factors based on the configuration data for the system, executing a simulation process for the simulation model for a deterministic simulation time, calculating a throughput of the system as a prediction of the performance of the system, and storing the results in a storage device.