Invention Grant
- Patent Title: Queue depth management for host systems accessing a peripheral component interconnect express (PCIe) device via a PCIe switch
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Application No.: US15635687Application Date: 2017-06-28
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Publication No.: US10579567B2Publication Date: 2020-03-03
- Inventor: Susan Elkington , Randy Roberson , Randall Hess , Michael Stillwell , Michael Walker
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F13/42 ; G06F13/16 ; G06F12/02
Abstract:
Described herein are enhancements for managing quality of service in a multi-host Peripheral Component Interconnect Express (PCIe) switching environment. In one implementation, a host system is configured to maintain quality of service statistics corresponding to data interactions with a PCIe storage device available via a PCIe switch. The host system may further receive secondary quality of service statistics for one or more other host systems communicatively coupled to the PCIe device via the PCIe switch, and determine a maximum queue depth for the host system based on the quality of service statistics and the second quality of service statistics to maintain a quality of service for the host systems.
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