Invention Grant
- Patent Title: Gate stack quality for gate-all-around field-effect transistors
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Application No.: US15947411Application Date: 2018-04-06
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Publication No.: US10566435B2Publication Date: 2020-02-18
- Inventor: Jingyun Zhang , Takashi Ando , Choonghyun Lee
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/10 ; H01L21/8234

Abstract:
A semiconductor device includes a first gate-all-around field-effect transistor (GAA FET) device including a first gate stack having first channels, interfacial layers formed around the first channels, and dielectric material including first and second portions having respective thicknesses formed on the first interfacial layers. The semiconductor device further includes a second GAA FET device including a second gate stack having second channels, the interfacial layers formed around the second channels, and the dielectric material formed on the second interfacial layers. A threshold voltage (Vt) shift associated with the semiconductor device is achieved based on a thickness of the first portion of the dielectric material.
Public/Granted literature
- US20190312120A1 GATE STACK QUALITY FOR GATE-ALL-AROUND FIELD-EFFECT TRANSISTORS Public/Granted day:2019-10-10
Information query
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