- Patent Title: Magnetic tunnel junction memory device with stress inducing layers
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Application No.: US16055695Application Date: 2018-08-06
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Publication No.: US10566041B2Publication Date: 2020-02-18
- Inventor: Jong-Koo Lim , Ku-Youl Jung , Jae-Hyoung Lee , Jeong-Myeong Kim , Tae-Young Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Perkins Coie LLP
- Priority: KR10-2017-0114543 20170907
- Main IPC: H01L29/82
- IPC: H01L29/82 ; G11C11/16 ; H01L43/08 ; H01L27/12 ; H01L43/02 ; H01L43/12 ; H01L43/10

Abstract:
An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.
Public/Granted literature
- US20190074042A1 ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2019-03-07
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