A circuit includes a first integration stage, a quantizer, a second integration stage coupled between the first integration stage and the quantizer, and a digital-to-analog converter (DAC). The first integration stage includes a first input node pair configured to receive a pair of differential analog input signals, and the quantizer is configured to generate a digital signal based on the pair of differential analog input signals and a clock signal. The second integration stage includes a second input node pair, and the DAC is configured to receive the digital signal and output feedback signals to at least one input node pair of the first input node pair or the second input node pair.