Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
-
Application No.: US15220498Application Date: 2016-07-27
-
Publication No.: US10553690B2Publication Date: 2020-02-04
- Inventor: Tetsuhiro Tanaka , Kazuki Tanemura , Daisuke Matsubayashi
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2015-154018 20150804; JP2016-023269 20160210
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/40 ; H01L49/02 ; H01L27/06

Abstract:
A miniaturized transistor with reduced parasitic capacitance and highly stable electrical characteristics is provided. High performance and high reliability of a semiconductor device including the transistor is achieved. A first conductor is formed over a substrate, a first insulator is formed over the first conductor, a layer that retains fixed charges is formed over the first insulator, a second insulator is formed over the layer that retains fixed charges, and a transistor is formed over the second insulator. Threshold voltage Vth is controlled by appropriate adjustment of the thicknesses of the first insulator, the second insulator, and the layer that retains fixed charges.
Public/Granted literature
- US20170040424A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-02-09
Information query
IPC分类: