Invention Grant
- Patent Title: Memory system and method for ware leveling
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Application No.: US15914604Application Date: 2018-03-07
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Publication No.: US10552314B2Publication Date: 2020-02-04
- Inventor: Naomi Takeda , Kenta Yasufuku , Hiroshi Yao
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2017-179593 20170919
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F3/06

Abstract:
According to one embodiment, a memory system includes a non-volatile first memory, and a controller. The controller associates a first number of consecutive logical addresses with the first number of physical addresses which are included in a second number of consecutive physical addresses of the first memory. The controller executes a first updating and a second updating. The first updating includes associating a first physical address among the second number of physical addresses with a first logical address. The second updating includes obtaining a second logical address which is away from the first logical address by a value corresponding to distance information on the basis of origin information and the distance information and associating, with the second logical address, a second physical address which had been associated with the first logical address before the first updating is executed.
Public/Granted literature
- US20190087324A1 MEMORY SYSTEM AND METHOD Public/Granted day:2019-03-21
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