Invention Grant
- Patent Title: Reorder buffer scoreboard having multiple valid bits to indicate a location of data
-
Application No.: US15240994Application Date: 2016-08-18
-
Publication No.: US10552158B2Publication Date: 2020-02-04
- Inventor: Thang Tran
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Fenwick & West LLP
- Main IPC: G06F9/38
- IPC: G06F9/38

Abstract:
Various embodiments of a microprocessor include a scoreboard implementation that directs the microprocessor to the location of data values. For example, the scoreboard may include individual bits that instruct the microprocessor to retrieve the data from a re-order buffer, retire queue, result bus, or register file. As a first step, the microprocessor receives an instruction indicating a process that requires data from one or more source registers. Instead of automatically retrieving the data from the register file, which is a costly process, the microprocessor may read the scoreboard to determine whether the needed data can be more cost-effectively retrieved from the re-order buffer, retire queue, or result busses. Therefore, the microprocessor can avoid costly data retrieval procedures. Additionally, the scoreboard implementation enables the microprocessor to handle limited out-of-order instructions, which improves overall performance of the microprocessor.
Public/Granted literature
- US20180052690A1 REORDER BUFFER SCOREBOARD Public/Granted day:2018-02-22
Information query