Invention Grant
- Patent Title: Low resistance interconnect structure with partial seed enhancement liner
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Application No.: US15994638Application Date: 2018-05-31
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Publication No.: US10546815B2Publication Date: 2020-01-28
- Inventor: Oscar van der Straten , Joseph F. Maniscalco , Koichi Motoyama , Alexander Reznicek
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent L. Jeffrey Kelly, Esq.
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L21/768 ; H01L21/3213
Abstract:
A method which exploits the benefits of a seed enhancement layer (in terms of void-free copper fill), while preventing copper volume loss during planarization, is provided. The method includes forming a partial seed enhancement liner in a lower portion of an opening that contains a recessed copper portion. Additional copper is formed in the upper portion of the opening providing a copper structure in which no copper volume loss at the uppermost interface of the copper structure is observed.
Public/Granted literature
- US20190371735A1 LOW RESISTANCE INTERCONNECT STRUCTURE WITH PARTIAL SEED ENHANCEMENT LINER Public/Granted day:2019-12-05
Information query
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