Invention Grant
- Patent Title: Method and device isolation structure in finFET
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Application No.: US15969419Application Date: 2018-05-02
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Publication No.: US10546770B2Publication Date: 2020-01-28
- Inventor: Min Gyu Sung
- Applicant: Varian Semiconductor Equipment Associates, Inc.
- Applicant Address: US MA Gloucester
- Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
- Current Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
- Current Assignee Address: US MA Gloucester
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/762 ; H01L29/66 ; H01L21/3065

Abstract:
A method of forming a semiconductor device. The method may include providing a semiconductor device structure. The semiconductor device structure may include a semiconductor fin; and a mask, disposed over the semiconductor fin, the mask defining a plurality of openings, wherein the semiconductor fin is exposed in the plurality of openings. The method may further include directing angled ions into the plurality of openings, wherein a plurality of trenches are formed in the semiconductor fin, wherein a given trench of the plurality of trenches comprises a reentrant profile.
Public/Granted literature
- US20190341295A1 METHOD AND DEVICE ISOLATION STRUCTURE IN FINFET Public/Granted day:2019-11-07
Information query
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