Invention Grant
- Patent Title: Fast-locking phase locked loop and fast locking method
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Application No.: US16122952Application Date: 2018-09-06
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Publication No.: US10541695B2Publication Date: 2020-01-21
- Inventor: Yuan-Hung Wang , Jing-Min Chen
- Applicant: ANPEC ELECTRONICS CORPORATION
- Applicant Address: TW Hsinchu
- Assignee: ANPEC ELECTRONICS CORPORATION
- Current Assignee: ANPEC ELECTRONICS CORPORATION
- Current Assignee Address: TW Hsinchu
- Agency: Li & Cai Intellectual Property (USA) Office
- Priority: TW107117946A 20180525
- Main IPC: H03L7/099
- IPC: H03L7/099

Abstract:
A fast-locking phase locked loop and a fast locking method are provided. The fast locking method includes dividing a frequency of an oscillation signal by a preset divisor to output a divided signal, detecting a frequency difference between the divided signal and a reference signal, tracking whether a divided frequency of the divided signal falls within a locked frequency range or not, if not, tracking the divided frequency, and if yes, locking the divided frequency, detecting a divided phase difference between a divided phase of the divided signal and a reference phase of the reference signal, recording the phase difference as a tracking reference phase difference, tracking a next divided phase according to the tracking reference phase difference, and determining whether the divided phase falls within a locked phase range, and if not, tracking the divided phase, and if yes, locking the divided phase.
Public/Granted literature
- US20190363721A1 FAST-LOCKING PHASE LOCKED LOOP AND FAST LOCKING METHOD Public/Granted day:2019-11-28
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