Invention Grant
- Patent Title: Patterning layers stacks for electronic devices
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Application No.: US15502795Application Date: 2015-08-18
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Publication No.: US10541258B2Publication Date: 2020-01-21
- Inventor: Shane Norval
- Applicant: FLEXENABLE LIMITED
- Applicant Address: GB Cambridge
- Assignee: FLEXENABLE LIMITED
- Current Assignee: FLEXENABLE LIMITED
- Current Assignee Address: GB Cambridge
- Agency: Sughrue Mion, PLLC
- Priority: GB1414630.2 20140818
- International Application: PCT/EP2015/068943 WO 20150818
- International Announcement: WO2016/026855 WO 20160225
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/033 ; H01L21/308

Abstract:
There is provided a method of patterning a stack of layers defining one or more electronic device elements, comprising: creating a first thickness profile in an uppermost portion of the stack of layers by laser ablation; and etching the stack of layers to translate the first thickness profile into a second thickness profile at a lower level; wherein the etching reduces the thickness of said uppermost portion of the stack and one or more lower layers of the stack under said uppermost portion.
Public/Granted literature
- US20170236850A1 PATTERNING LAYER STACKS FOR ELECTRONIC DEVICES Public/Granted day:2017-08-17
Information query
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