Invention Grant
- Patent Title: Semiconductor device
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Application No.: US16049151Application Date: 2018-07-30
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Publication No.: US10541247B2Publication Date: 2020-01-21
- Inventor: Wataru Sakamoto
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11519 ; H01L29/10 ; H01L27/11565 ; H01L27/11582 ; H01L21/28
Abstract:
According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, a first charge storage portion, and a second charge storage portion. The stacked body includes a plurality of electrode layers stacked in a first direction. The plurality of electrode layers includes a first electrode layer, and a second electrode layer. The columnar portion extends in the first direction in the stacked body. The first charge storage portion provides between the first electrode layer and the columnar portion. The second charge storage portion provides between the second electrode layer and the columnar portion. A first thickness in a second direction intersecting the first direction of the first charge storage portion between the first electrode layer and the columnar portion is thicker than a second thickness in the second direction of the second charge storage portion between the second electrode layer and the columnar portion.
Public/Granted literature
- US20180350828A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-12-06
Information query
IPC分类:
