Invention Grant
- Patent Title: Mapping-based wear leveling for non-volatile memory
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Application No.: US15949976Application Date: 2018-04-10
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Publication No.: US10540100B2Publication Date: 2020-01-21
- Inventor: Amir Hossein Gholamipour , Chandan Mishra , Daniel Helmick
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: Kunzler Bean & Adamson, PC
- Main IPC: G06F3/00
- IPC: G06F3/00 ; G06F3/06 ; G06F12/1009

Abstract:
Apparatuses, systems, and methods are disclosed for mapping-based wear leveling for non-volatile memory. An apparatus may include one or more non-volatile memory elements, and a controller. A controller may maintain a logical-to-physical mapping for converting logical addresses to physical addresses. A logical-to-physical mapping may include a translation table that associates groups of logical addresses with groups of physical addresses, and one or more mathematical mappings. A mathematical mapping for a group of logical addresses may associate individual logical addresses within the group of logical addresses with individual physical addresses within a corresponding group of physical addresses. A controller may change at least one mathematical mapping. A controller may move data based on at least one changed mapping.
Public/Granted literature
- US20190310780A1 MAPPING-BASED WEAR LEVELING FOR NON-VOLATILE MEMORY Public/Granted day:2019-10-10
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