Invention Grant
- Patent Title: Low resistance vertical cavity light source with PNPN blocking
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Application No.: US16014305Application Date: 2018-06-21
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Publication No.: US10530127B2Publication Date: 2020-01-07
- Inventor: Dennis G. Deppe
- Applicant: University of Central Florida Research Foundation, Inc.
- Applicant Address: US FL Orlando
- Assignee: University of Central Florida Research Foundation, Inc.
- Current Assignee: University of Central Florida Research Foundation, Inc.
- Current Assignee Address: US FL Orlando
- Agency: Fleit Intellectual Property Law
- Agent Thomas S. Grzesik
- Main IPC: H01S5/00
- IPC: H01S5/00 ; H01S5/183 ; H01S5/32 ; H01S5/323 ; H01S5/20 ; H01S5/30

Abstract:
A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.
Public/Granted literature
- US20190020176A1 LOW RESISTANCE VERTICAL CAVITY LIGHT SOURCE WITH PNPN BLOCKING Public/Granted day:2019-01-17
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