Low resistance vertical cavity light source with PNPN blocking
Abstract:
A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.
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