Invention Grant
- Patent Title: Methods and systems for wafer bonding alignment compensation
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Application No.: US16046689Application Date: 2018-07-26
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Publication No.: US10529694B2Publication Date: 2020-01-07
- Inventor: Shuai Guo
- Applicant: Yangtze Memory Technologies Co., Ltd.
- Applicant Address: CN Wuhan
- Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee: Yangtze Memory Technologies Co., Ltd.
- Current Assignee Address: CN Wuhan
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: B81C3/00
- IPC: B81C3/00 ; H01L21/66 ; H01L25/00 ; H01L23/544 ; H01L25/065

Abstract:
Embodiments of methods and systems for wafer bonding alignment compensation are disclosed. The method comprises bonding a first pair of wafers including multiple bonding alignment mark pairs on the first pair of wafers; first analyzing a translational misalignment and a rotational misalignment between the first pair of wafers based on a measurement of at least two bonding alignment mark pairs; controlling a wafer position adjustment module to compensate for the translational misalignment and the rotational misalignment during bonding of a second pair of wafers based on the first analysis; second analyzing a mean run-out misalignment between the first pair of wafers based on a measurement of the multiple bonding alignment mark pairs; and controlling a wafer deformation adjustment module to compensate for the run-out misalignment during bonding of a third pair of wafers based on the second analysis.
Public/Granted literature
- US20190355698A1 METHODS AND SYSTEMS FOR WAFER BONDING ALIGNMENT COMPENSATION Public/Granted day:2019-11-21
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