Invention Grant
- Patent Title: SiN selective etch to SiO2 with non-plasma dry process for 3D NAND device applications
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Application No.: US15858342Application Date: 2017-12-29
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Publication No.: US10529581B2Publication Date: 2020-01-07
- Inventor: Chih-Yu Hsu , Peng Shen , Takashi Teramoto , Nathan Stafford , Jiro Yokota
- Applicant: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude , Air Liquide Electronics U.S. LP
- Applicant Address: FR Paris US TX Dallas
- Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude,Air Liquide Electronics U.S. LP
- Current Assignee: L'Air Liquide, Société Anonyme pour l'Etude et l'Exploitation des Procédés Georges Claude,Air Liquide Electronics U.S. LP
- Current Assignee Address: FR Paris US TX Dallas
- Agent Yan Jiang
- Main IPC: H01L21/311
- IPC: H01L21/311 ; H01L21/3213 ; H01L27/108 ; H01L27/115

Abstract:
Methods for isotropic etching at least a portion of a silicon-containing layer on a sidewall of high-aspect-ratio (HAR) apertures formed on a substrate in a reaction chamber are disclosed. The HAR aperture formed by plasma etching a stack of alternating layers of a first silicon-containing layer and a second silicon-containing layer, the second silicon-containing layer is different from the first silicon-containing layer. The method comprising the steps of: a) introducing a fluorine containing etching gas selected from the group consisting of nitrosyl fluoride (FNO), trifluoroamine oxide (F3NO), nitryl fluoride (FNO2) and combinations thereof into the reaction chamber; and b) removing at least a portion of the second silicon-containing layers by selectively etching the second silicon-containing layers versus the first silicon-containing layers with the fluorine containing etching gas to produce recesses between the first silicon-containing layers on the sidewall of the HAR aperture. Alternatively, the disclosed etching processes are cyclic etching processes.
Public/Granted literature
- US20190206696A1 SiN SELECTIVE ETCH TO SiO2 WITH NON-PLASMA DRY PROCESS FOR 3D NAND DEVICE APPLICATIONS Public/Granted day:2019-07-04
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