Invention Grant
- Patent Title: Low power scheduling
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Application No.: US14927174Application Date: 2015-10-29
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Publication No.: US10405278B2Publication Date: 2019-09-03
- Inventor: Peter Pui Lok Ang , Tingfang Ji , Jing Jiang , Krishna Kiran Mukkavilli , Joseph Binamira Soriaga , John Edward Smee , Naga Bhushan
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Agent Clint R. Morin
- Main IPC: H04W52/02
- IPC: H04W52/02 ; H04L1/18 ; H04W72/04 ; H04B7/04 ; H04B7/0413 ; H04W76/28

Abstract:
The disclosure relates in some aspects to an energy-aware architecture that supports a low power scheduling mode. For example, a media access control (MAC) architecture for a base station (e.g., an enhanced Node B) and associated access terminals (e.g., UEs) can take the power needs of the access terminals into account when scheduling the access terminals. In some aspects, an access terminal may support a particular frame structure for a low power mode. Accordingly, scheduling of the access terminal may include use of the particular frame structure during low power mode.
Public/Granted literature
- US20160127997A1 LOW POWER SCHEDULING Public/Granted day:2016-05-05
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