Invention Grant
- Patent Title: Systems and methods for the design and implementation of input and output ports for circuit design
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Application No.: US16209823Application Date: 2018-12-04
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Publication No.: US10404444B2Publication Date: 2019-09-03
- Inventor: Stefano Giaconi , Giacomo Rinaldi , Matheus Trevisan Moreira , Matthew Pryor , David Fong
- Applicant: CHRONOS TECH LLC
- Applicant Address: US CA San Diego
- Assignee: CHRONOS TECH LLC
- Current Assignee: CHRONOS TECH LLC
- Current Assignee Address: US CA San Diego
- Agency: Procopio
- Agent Mark W. Catanese; Noel C. Gillespie
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L12/24 ; H04L12/933 ; H04L12/851 ; H04L12/947 ; H04L12/935 ; H04L12/861 ; H04L12/741 ; H04L12/725

Abstract:
Systems and methods for providing input and output ports to connect to channels are provided. Input and output ports are the basic building blocks to create more complex data routing IP blocks. By aggregating these modular ports in different ways, different implementations of crossbar or Network on Chip (NoC) can be implemented, allowing flexible routing structure while maintaining all the benefits of channels such as robustness against delay variation, data compression and simplified timing assumptions.
Public/Granted literature
- US20190116020A1 SYSTEMS AND METHODS FOR THE DESIGN AND IMPLEMENTATION OF INPUT AND OUTPUT PORTS FOR CIRCUIT DESIGN Public/Granted day:2019-04-18
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