Invention Grant
- Patent Title: Method of forming a gate structure of a semiconductor device
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Application No.: US16193880Application Date: 2018-11-16
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Publication No.: US10403737B2Publication Date: 2019-09-03
- Inventor: Hsin-Che Chiang , Ju-Yuan Tzeng , Chun-Sheng Liang , Shu-Hui Wang , Kuo-Hua Pan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02 ; H01L29/40 ; H01L29/51 ; H01L29/78 ; H01L21/28 ; H01L29/49 ; H01L21/3115

Abstract:
A method of forming a gate structure of a semiconductor device including depositing a high-k dielectric layer over a substrate is provided. A dummy metal layer is formed over the high-k dielectric layer. The dummy metal layer includes fluorine. A high temperature process is performed to drive the fluorine from the dummy metal layer into the high-k dielectric layer thereby forming a passivated high-k dielectric layer. Thereafter, the dummy metal layer is removed. At least one work function layer over the passivated high-k dielectric layer is formed. A fill metal layer is formed over the at least one work function layer.
Public/Granted literature
- US20190088763A1 SEMICONDUCTOR DEVICE GATE STRUCTURE AND METHOD OF FABRICATING THEREOF Public/Granted day:2019-03-21
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