Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US16294190Application Date: 2019-03-06
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Publication No.: US10403713B2Publication Date: 2019-09-03
- Inventor: Masanobu Iwaya , Akimasa Kinoshita , Shinsuke Harada , Yasunori Tanaka
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi, Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi, Kanagawa
- Agency: Rabin & Berdo, P.C.
- Priority: JP2015-204669 20151016
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/06 ; H01L29/16 ; H01L21/04 ; H01L29/10 ; H01L29/66

Abstract:
In a first main surface of a silicon carbide semiconductor base, a trench is formed. On a first main surface side of the silicon carbide semiconductor base, an n-type silicon carbide epitaxial layer is deposited. In a surface of the n-type silicon carbide epitaxial layer, an n-type high-concentration region is provided. In the surface of the n-type silicon carbide epitaxial layer, a first p-type base region and a second p+-type base region are selectively provided. The second p+-type base region is formed at the bottom of the trench. A depth of the n-type high-concentration region is deeper than that of the first p-type base region and the second p+-type base region. Thus, by an easy method, the electric field at a gate insulating film at the bottom of the trench is mitigated, enabling the breakdown voltage of the active region to be maintained and the ON resistance to be lowered.
Public/Granted literature
- US20190206985A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2019-07-04
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