Invention Grant
- Patent Title: Semiconductor packages and methods of packaging semiconductor devices
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Application No.: US15726409Application Date: 2017-10-06
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Publication No.: US10403592B2Publication Date: 2019-09-03
- Inventor: Yongbo Yang , Antonio Jr. Bambalan Dimaano , Chun Hong Wo
- Applicant: UTAC Headquarters Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: UNITED TEST AND ASSEMBLY CENTER LTD.
- Current Assignee: UNITED TEST AND ASSEMBLY CENTER LTD.
- Current Assignee Address: SG Singapore
- Agency: Horizon IP Pte. Ltd.
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L21/768 ; H01L21/683 ; H01L23/00 ; H01L23/498 ; H01L23/31

Abstract:
Semiconductor packages and methods for forming a semiconductor package are disclosed. The method includes providing a package substrate having first and second major surfaces. The package substrate includes a base substrate having a mold material and a plurality of interconnect structures including via contacts extending through the first to the second major surface of the package substrate. A die having conductive contacts on its first or second surface is provided. The conductive contacts of the die are electrically coupled to the interconnect structures. A cap is formed over the package substrate to encapsulate the die.
Public/Granted literature
- US20180033759A1 SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES Public/Granted day:2018-02-01
Information query
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