Invention Grant
- Patent Title: High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He—N2 co-implantation
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Application No.: US15977599Application Date: 2018-05-11
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Publication No.: US10403541B2Publication Date: 2019-09-03
- Inventor: Qingmin Liu , Robert Wendell Standley
- Applicant: SunEdison Semiconductor Limited (UEN201334164H)
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/322
Abstract:
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and comprises a region of nitrogen-reacted nanovoids in the front surface region; a silicon dioxide layer on the surface of the semiconductor handle substrate; a dielectric layer in contact with the silicon dioxide layer; and a semiconductor device layer in contact with the dielectric layer.
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