Invention Grant
- Patent Title: Expansion method, method for manufacturing semiconductor device, and semiconductor device
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Application No.: US15983158Application Date: 2018-05-18
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Publication No.: US10403538B2Publication Date: 2019-09-03
- Inventor: Yukihiro Iwanaga , Kouji Suzumura , Tatsuya Sakuta
- Applicant: HITACHI CHEMICAL COMPANY, LTD.
- Applicant Address: JP Tokyo
- Assignee: HITACHI CHEMICAL COMPANY, LTD.
- Current Assignee: HITACHI CHEMICAL COMPANY, LTD.
- Current Assignee Address: JP Tokyo
- Agency: Fitch, Even, Tabin & Flannery, LLP
- Priority: JP2012-282785 20121226
- Main IPC: H01L21/68
- IPC: H01L21/68 ; H01L21/78 ; H01L23/00 ; H01L21/683

Abstract:
An embodiment of the present invention relates to an expansion method comprising: a step (I) of preparing a laminate having a semiconductor wafer in which modified sections have been formed along intended cutting lines, a die bonding film and a dicing tape, a step (IIA) of expanding the dicing tape with the laminate in a cooled state, a step (IIB) of loosening the expanded dicing tape, and a step (IIC) of expanding the dicing tape with the laminate in a cooled state, dividing the semiconductor wafer and the die bonding film into chips along the intended cutting lines, and widening the spaces between the chips.
Public/Granted literature
- US20180323097A1 EXPANSION METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE Public/Granted day:2018-11-08
Information query
IPC分类: